ISCL高性能模拟射频芯片设计团队简介
南京大学智能感知与通信实验室——高性能模拟射频芯片设计团队，致力于先进模拟射频芯片设计实现从毫米到百米的芯片间高速互联，与华为、Intel、长鑫存储等企业开展项目合作，兼顾科研创新与产业落地。
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加入我们的团队，在工作中相互成就！
欢迎大二、大三同学提前与我们建立合作，相互了解，简历投递至以下邮箱，并注明模拟射频芯片设计团队：
杜源老师 yuandu@nju.edu.cn
并抄送郭嘉诚guojiacheng@nju.edu.cn 刘谦 qianliu@smail.nju.edu.cn
代表性工作
高速接口电路设计
抗串扰方案：创新编码策略，串扰消除技术
高速SerDes：集成高性能架构，高速率数据传输
超高密度通信IO：DDR、HBM、Chiplet
太赫兹芯片设计
工作在140GHz频段的宽带高速高频芯片
基于介质波导的数据通信系统
代表性论文
[1] Y. Du, et.al, A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection, in IEEE Journal of Solid-State Circuits, vol. 52, no. 4, pp. 1111-1122, April 2017
[2] J. Du, et.al, A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface, 2020 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, 2020
[3] Y. Kim et al., A Millimeter-Wave CMOS Transceiver With Digitally Pre-Distorted PAM-4 Modulation for Contactless Communications, in IEEE Journal of Solid-State Circuits, vol. 54, no. 6, pp. 1600-1612, June 2019
[4] S. Hao et al., An 8.3% Efficiency 96–134 GHz CMOS Frequency Doubler Using Distributed Amplifier and Nonlinear Transmission Line, 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2020
[5] Q. Liu, L. Du and Y. Du, A 0.90-Tb/s/in 1.29-pJ/b Wireline Transceiver With Single-Ended Crosstalk Cancellation Coding Scheme for High-Density Interconnects, in IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2023.3261125.(https://ieeexplore.ieee.org/document/10090936)
[6] C. Zhao, W. Fan, J. Lv, L. Du and Y. Du, An X-band Phase Detector Based on Quadrature Modulation in 28-nm CMOS, 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 3077-3081, doi: 10.1109/ISCAS48785.2022.9937765.
[7] X. He, Y. Wu, Y. Bai, J. Liu, L. Du and Y. Du, A Reconfigurable Design of Flexible-arbitrated Crossbar Interconnects in Multi-core SoC system, 2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Penang, Malaysia, 2022, pp. 368-374, doi: 10.1109/MCSoC57363.2022.00064.
[8] T. Ma, Z. Xu, L. Du and Y. Du, Inductively-Coupled High-Speed Interconnects of 3D-Integrated CMOS Image Sensors, 2022 7th International Conference on Integrated Circuits and Microsystems (ICICM), Xi'an, China, 2022, pp. 534-538, doi: 10.1109/ICICM56102.2022.10011292.
[9] J. Lv, L. Du and Y. Du, A 31–46 GHz Dual-Core Class-C VCO Using Switchable Transformers in 28-nm CMOS, in IEEE Microwave and Wireless Technology Letters, vol. 33, no. 9, pp. 1341-1344, Sept. 2023, doi: 10.1109/LMWT.2023.3288408.
[10] Y. Wu, T. Li, Z. Shao, L. Du and Y. Du, An Efficient Design Framework for 2×2 CNN Accelerator Chiplet Cluster with SerDes Interconnects, 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS), Hangzhou, China, 2023, pp. 1-5, doi: 10.1109/AICAS57966.2023.10168573.
[11] H. Zhang, Y. Li, W. Yin, Y. Du and L. Du, Design and Analysis of a Nanosecond Burst-Mode CDR Using MATLAB/Simulink and Opti-System Co-Simulation, in IEEE Photonics Journal, vol. 15, no. 5, pp. 1-6, Oct. 2023, Art no. 7101406, doi: 10.1109/JPHOT.2023.3307687.
[12]J. Lv, L. Du and Y. Du, A W-band Phase-Locked Loop with a Robust Injection-Locked Frequency Divider, 2023 8th International Conference on Integrated Circuits and Microsystems (ICICM), Nanjing, China, 2023, pp. 159-163（2023 The 8th International Conference onIntegrated Circuits and Microsystems最佳论文奖）
[13]Jingjing Lv, Yajie Wu, Li Du, Yuan Du，A wide locking range injection‐locked frequency divider with an auto‐adjusted injection bias[J]. Microwave and Optical Technology Letters, 2024, 66(2): e34071.
[14]Zhang P, Lv J, Hou S, et al. Near-Field Probing of Microwave Oscillators with Josephson Microscopy[J]. Nano Letters, 2024, 24(18): 5453-5459.
[15]X. Lu et al., A Non-Centralized Routing Scheme with Phase-Caching CDR for Nanosecond-Level Optical Switching Systems, 2023 IEEE 15th International Conference on ASIC (ASICON), Nanjing, China, 2023, pp. 1-4